Hardware Formal Verification Engineer Jobs in Cambridge, United Kingdom

Cambridge, UK | Full-time | Permanent | 46,000 - 55,000About us Riverlane’s mission is to make quantum computing useful far sooner than previously imaginable, starting an era of human progress as significant as the industrial and digital revolutions. Large and reliable quantum computers have the potential to turn fields like clean energy, drug design and aerospace upside down. We’re building the Operating System for these pioneering new machines, leading the world to tackle quantum computing’s defining challenge: error correction. We’re growing fast and making remarkable progress. About the roleYou will join the Engineering Function, focusing on the verification of our hardware IPs and SOC solutions. As part of the verification team, you will define IP, subsystem and system level tests to fully test our solutions. You will use state of the art techniques and tool to identify bugs in our products before they reach our users. You will work hand-in-hand with our hardware designers to maximize internal learnings and quality of our processes and products. RequirementsWhat you will doWorking as part of the Deltaflow Control product team, you will work with our hardware designers and software embedded engineers to produce a fully verified, trusted and performant solution. We want to have robust verification framework where simulation and formal based verification complement each other. As part of your role, you will: Work with designers and architects to identify key design features for formal verification Create a comprehensive formal verification plan. Develop re-usable and scalable formal verification code base Develop, extend, maintain and improve our SVA checkers for formal and simulation use Track and report verification metrics and closure

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